Publikationen
2024
[24-01] | S. Zillien, T. Schmidbauer, M. Kubek, J. Keller, S. Wendzel. |
[24-02] | M. Boulasikis, C. Kessler, F. Gruian, J. Keller, S. Litzinger. Packet-Type Aware Scheduling of Moldable Streaming Tasks on Multicore Systems with DVFS. |
[24-03] | M. Walter, J. Keller. 5G UnCovert: Hiding Information in 5G New Radio. |
[24-04] | P. Tippe. |
[24-05] | C. Heßeling, S. Litzinger, J. Keller. |
[24-06] | P. Tippe. Onion Services in the Wild: A Study of Deanonymization Attacks. |
[24-07] | K. Hölk, W. Mazurczyk, M. Zuppelli, L. Caviglione. Investigating HTTP Covert Channels Through Fuzz Testing. |
[24-08] | J. Keller, S. Imhof, P. Sobe. |
[24-09] | S. Wendzel, T. Schmidbauer, S. Zillien, J. Keller. DYST (Did You See That?): An Amplified Covert Channel That Points To Previously Seen Data. To appear in: IEEE Transactions on Dependable and Secure Computing, 2024. |
[24-10] | M. Olbort, D. Spiekermann, J. Keller. |
[24-11] | J. Keller, C. Heßeling, S. Wendzel. |
[24-12] | D. Spiekermann, J. Keller. |
[24-13] | S. Khosravi, C. Kessler, S. Litzinger, J. Keller. Energy-Efficient Scheduling of Moldable Streaming Computations for the Edge-Cloud Continuum. |
[24-14] | D. Spiekermann, T. Eggendorfer, J. Keller. |
[24-15] | L. Oden, S. Litzinger, J. Keller. |
[24-16] | P. Tippe, L. Donah. Optimizing Onionbalance: Improving Scalability and Security for Tor Onion Services. To appear in: Proc. 29th Nordic Conference on Secure IT Systems (NordSec 2024), Karlstad, Sweden, Nov 6-7, 2024. |
[24-17] | M. Walter, J. Keller. Design and Evaluation of Steganographic Channels in Fifth-Generation New Radio. In: Future Internet, vol. 16 no. 11 art. no. 410, 2024. |
2023
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2022
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[16-01] J. Lenhardt, W. Schiffmann, J. Keller
Interplay of Power Management at Core and Server Level (PDF 224 KB).
In: International Journal of Computer, Electrical, Automation, Control and Information Engineering Vol. 10, No. 1, 2016.[16-02] S. Holmbacka, J. Keller, P. Eitschberger, J. Lilius
Accurate Energy Modeling for Many-core Static Schedules with Streaming Applications (PDF 4 MB).
In: Microprocessors and Microsystems, Vol. 43 pp. 14-25, 2016.[16-03] G. Spenger, J. Keller
Analysis of PRNGs with Large State Spaces and Structural Improvements.In: International Journal of RFID Security and Cryptography. Vol. 3 No. 2 pp. 170-176, 2016.[16-04] N. Melot, C. Kessler, J. Keller
Energy-Optimized Static Scheduling for Many-Cores with Task Parallelization, DVFS and Core Consolidation.
In: Proc. 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2016) p. 126, 2016.[16-05] D. Spiekermann, T. Eggendorfer
Towards Digital Investigation in Virtual Networks: A Study of Challenges and Open Problems. (PDF 118 KB)
In: Proc. 11th International Workshop on Cyber Crime (IWCC 2016), Salzburg, September 2016.[16-06] G. Spenger, J. Keller
Structural Improvements of Chaotic PRNG Implementations (PDF 612 KB)
In: Proc. 11th International Conference for Internet Technology and Secured Transactions (PDF 270 KB) (ICITST-2016), Barcelona, Dec. 2016, pp. 465-470.[16-07] P. Eitschberger, J. Keller
Optimizing Parallel Runtime of Cryptanalytic Algorithms by Selecting Between Word-Parallel and Bit-Serial Variants of Program Parts.
In: PARS-Mitteilungen No. 33, Gesellschaft für Informatik, Sept. 2016, pp. 22-31.[16-08] S. Wendzel, J. Keller (Eds).
Special Issue on Security, Privacy and Reliability of Smart Buildings.
In: Journal of Universal Computer Science, Vol. 22 No. 9, pp. 1201-1202, Sept. 2016 -
[15-01] N. Melot, C. Kessler, P. Eitschberger, J. Keller.
Fast Crown Scheduling Heuristics for Energy-Efficient Mapping and Scaling of Moldable Streaming Tasks on Many-Core Systems. (PDF 3 MB)
ACM Transactions on Architecture and Code Optimization (TACO), Vol. 11, No. 4, Art. 62, Jan 2015.[15-02] P. Eitschberger, J. Keller.
Energy-Efficient Task Scheduling in Manycore Processors with Frequency Scaling Overhead. (PDF 411 KB)
In: Proc. 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2015), pp. 541-548, Turku, Finland, March 2015.[15-03] S. Holmbacka, P. Eitschberger, J. Keller, J. Lilius.
Accurate Energy Modelling for Many-Core Static Schedule.
In: Proc. 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP 2015), pp. 525-532, Turku, Finland, March 2015.[15-04] M. Naumann, S. Wendzel, W. Mazurczyk, J. Keller.
Micro protocol engineering for unstructured carriers: On the embedding of steganographic control protocols into audio transmissions.
arXiv:1505.07757, May 2015.
In: Security and Communication Networks, Vol. 9 No. 15 pp. 2972-2985, 2016.[15-05] N. Melot, C. Kessler, J. Keller, P. Eitschberger.
Fast Crown Scheduling Heuristics for Energy-Efficient Mapping and Scaling of Moldable Streaming Tasks on Many-Core Systems.
In: Proc. 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2015), pp. 105-108, Sankt Goar, Juni 2015.[15-06] D. Spiekermann, T. Eggendorfer and J. Keller.
Using Network Data to Improve Digital Investigation in Cloud Computing Environments. (PDF 128 KB)
In: Proc. 2015 International Conference on High Performance Computing & Simulation (HPCS 2015), pp. 98-105, Amsterdam, July 20-24, 2015.[15-07] A. Bouti, J. Keller.
Towards Practical Homomorphic Encryption in Cloud Computing (PDF 109 KB).
In: Proc. IEEE 4th Symposium on Network Cloud Computing and Applications (NCCA15), pp. 67-74, Munich, June 11-12, 2015.[15-08] N. Melot, C. Kessler, J. Keller.
Improving Energy-Efficiency of Static Schedules by Core Consolidation and Switching Off Unused Cores.
In: Proc. International Conference on Parallel Computing (ParCO 2015), pp. 285-294, Edinburgh, UK, Sept 2015.[15-09] J. Keller.
Extending Static Scheduling Algorithms for Moldable Tasks towards Dynamic Scheduling of Multiple Applications with Soft Real-Time Properties. (PDF 40 KB)
In: Proc. 8th GI Conference on Autonomous Systems (AutSys 2015), Cala Millor, Spain, Oct 2015, pp. 1-5, VDI 2015.[15-10] G. Spenger, J. Keller
Security Aspects of PRNGs with Large State Spaces. (PDF 270 KB)
In: Proc. 10th International Conference for Internet Technology and Secured Transactions
(ICITST-2015), pp. 181-185, London, Dec. 2015. -
[14-01] J. Lenhardt, W. Schiffmann, P. Eitschberger, J. Keller.
Power-efficient Load Distribution in Heterogeneous Computing Environments. (PDF 2 MB)
In: Proc. IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN 2014), pp. 15-20, Innsbruck, Feb. 2014.[14-02] S. Wendzel, J. Keller.
Hidden and Under Control. A Survey and Outlook on Covert Channel-internal Control Protocols. (PDF 292 KB)
Annals of Telecommunications, Volume 69, Issue 7-8, pp. 417-430, 2014.[14-03] S. Wendzel, J. Keller.
IT-gestütztes Management und Controlling: Verdeckte Kanäle – eine zunehmende Gefahr für Unternehmensdaten. (PDF 77 KB)
Controlling (Zeitschrift für erfolgsorientierte Unternehmenssteuerung), Vol. 26, No. 14/6, pp. 304-308, 2014.[14-04] J.-O. Janda, A. Popal, J. Bauer, M. Busch, M. Klocke, W. Spitzer, J. Keller, R. Merkl.
H2rs: Deducing evolutionary and functionally important residue positions by means of an entropy and similarity based analysis of multiple sequence alignments. (PDF 1 MB)
In: BMC Bioinformatics, Vol 15, No 1, Art. 118, 2014.[14-05] M. Hanspach, J. Keller.
On the Implications, the Identification and the Mitigation of Covert Physical Channels. (PDF 487 KB)
In: Proc. 9th Security Research Conference on Future Security, pp. 566-573, Berlin, Sept 16-18, 2014.[14-06] J. Lenhardt, W. Schiffmann, J. Keller.
Trends in Static Power Consumption. (PDF 453 KB)
In: Proc. 7th Swedish Workshop on Multicore Computing (MCC 2014), Lund, Sweden, Nov 2014. -
[13-01] C. Kessler, P. Eitschberger, J. Keller.
Energy-Efficient Static Scheduling of Streaming Task Collections with Malleable Tasks. (PDF 175 KB)
In: PARS-Mitteilungen Vol. 30 pp. 37-46, 2013.[13-02] P. Eitschberger, J. Keller.
Efficient and Fault-Tolerant Static Scheduling for Grids. (PDF 238 KB)
In: Proc. 2013 IEEE International Symposium on Parallel & Distributed Processing Workshops, pp. 1439-1448, Cambridge, MA, USA, May 20-24, 2013.[13-03] P. Eitschberger, J. Keller.
Energy-efficient and Fault-Tolerant Taskgraph Scheduling for Manycores and Grids. (PDF 240 KB)
In: Proc. Euro-Par 2013 Parallel Processing Workshops, pp. 769-778, Aachen, August 26-27, 2013.[13-04] C.W. Kessler, N. Melot, P. Eitschberger, J. Keller.
Crown Scheduling: Energy-Efficient Resource Allocation, Mapping and Discrete Frequency Scaling for Collections of Malleable Streaming Tasks. (PDF 312 KB)
In: Proc. 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2013), Karlsruhe, Sept. 2013.[13-05] M. Hanspach, J. Keller.
In Guards we trust: Security and Privacy in Operating Systems revisited. (PDF 231 KB)
In: Proc. 5th ASE/IEEE International Conference on Information Privacy, Security, Risk and Trust (PASSAT 2013), pp. 578-585, Washington D.C., Sept. 2013.[13-06] J. Lenhardt, W. Schiffmann, P. Eitschberger, J. Keller.
Power-Efficient Server Utilization in Compute Clouds. (PDF 257 KB)
In: Proc. 3rd Berkeley Symposium on Energy Efficient Electronic Systems, pp. 1-2, Oct 2013.[13-07] N. Melot, C. Kessler, J. Keller.
Energy-Efficient Mapping of Streaming Tasks for Crown Scheduling on Many-Core Systems. (PDF 644 KB)
In: Proc. 6th Swedish Workshop on Multicore Computing (MCC 2013), Halmstad, Nov 2013.[13-08] P. Eitschberger, J. Keller, F. Thiele, C. Kessler.
Exploring the Placement of Memory Controllers in Manycore Processors: A Case Study for Intel SCC. (PDF 309 KB)
In: Proc. 6th Swedish Workshop on Multicore Computing (MCC 2013), Halmstad, Nov 2013.[13-09] M. Hanspach, J. Keller.
A Taxonomy for Attack Patterns on Information Flows in Component-Based Operating Systems. (PDF 202 KB)
In: Proc. 7th Layered Assurance Workshop (LAW), pp. 19-27, New Orleans, Dec 9-13, 2013. -
[12-01] A. Beckmann, J. Fedorowicz, U. Meyer, J. Keller.
A structural analysis of the A5/1 state transition graph. (PDF 704 KB)
In: Proc. 1st Workshop on GRAPH Inspection and Traversal Engineering (GRAPHITE 2012), Electronic Proceedings in Theoretical Computer Science, pp. 5-19, Tallinn, Estonia, April 2012.[12-02] S. Wendzel, J. Keller.
Design and Implementation of an Active Warden Addressing ProtocolSwitching Covert Channels. (PDF 230 KB)
In: Proc. 7th International Conference on Internet Monitoring and Protection (ICIMP 2012), pp. 1-6, Stuttgart, May 2012.[12-03] J. Brenner, J. Keller, C. Kessler.
Executing PRAM Programs on GPUs. (PDF 252 KB)
In: Proc. International Conference on Computational Science (ICCS 2012), Procedia Computer Science Vol. 9, pp. 1799-1806, Omaha, Nebraska, June 2012.[12-04] N. Melot, C. Kessler, K. Avdic, P. Cichowski, J. Keller.
Engineering parallel sorting for the Intel SCC. (PDF 290 KB)
In: Proc. International Conference on Computational Science (ICCS 2012), Procedia Computer Science Vol. 9, pp. 1890-1899, Omaha, Nebraska, June 2012.[12-05] A. Bouti, J. Keller.
Securing Cloud-based Computations against malicious providers. (PDF 100 KB)
In: Proc. 1st European Workshop on Dependable Cloud Computing (EWDCC 2012), Sibiu, Romania, May 2012.
Reprint in: ACM SIGOPS Operating Systems Review, Vol. 46 Issue 2, pp. 38-42, July 2012.[12-06] Jörg Keller, Christoph W. Kessler, Rikard Hulten.
Optimized on-chip-pipelining for memory-intensive computations on multi-core processors with explicit memory hierarchy.
Journal of Universal Computer ScienceVol. 18 No. 14, pp. 1987-2023, 2012.[12-07] Patrick Cichowski, Jörg Keller and Christoph Kessler.
Modelling Power Consumption of the Intel SCC.
In: Proc. 6th Many-core Applications Research Community (MARC) Symposium pp. 46-51, ONERA, Toulouse, July 2012.[12-08] Steffen Wendzel, Jörg Keller.
Systematic Engineering of Control Protocols for Covert Channels. (PDF 365 KB)
In: Proc. 13th Conference on Communications and Multimedia Security (CMS 2012), pp. 131-144, Kent, Oct 2012.[12-09] P. Cichowski, J. Keller, C. Kessler.
Energy-efficient Mapping of Task Collections onto Manycore Processors. (PDF 197 KB)
In: Proc. 5th Swedish Workshop on Mulitcore Computing (MCC 2012),
Stockholm, Nov 2012.[12-10] P. Backs, S. Wendzel, J. Keller.
Dynamic Routing in Covert Channel Overlays Based on Control Protocols. (PDF 516 KB)
In: Proc. 7th International Conference for Internet Technology and Secured Transactions (ICITST 2012) pp. 32-39 London, Dec 2012.[12-11] Patrick Cichowski, Gabriele Iannetti, Jörg Keller.
Towards Converting POSIX Threads Programs for Intel SCC. (PDF 172 KB)
In: Proc. Many-core Applications Research Community Symposium 2012 (MARC@RWTH), Aachen, Nov. 2012.[12-12] S. Wendzel, J. Keller.
Preventing Protocol Switching Covert Channels.
In: International Journal On Advances in Security Vol. 5 No. 3 & 4, pp. 81-93, 2012. -
[11-01] Henning Klein, Jörg Keller.
Simulating Fault Injection Into Disk Arrays (PDF 470 KB).
In: Proc. 24th International Conference on Architecture of Computing Systems (ARCS 2011) Workshops, Como, Feb. 2011.[11-02] Roman Messmer, Jörg Keller.
A Parallel Fault-tolerant Routing Algorithm for Real-Time MediaTransmission. (PDF 323 KB)
In: Proc. 24th International Conference on Architecture of Computing Systems (ARCS 2011) Workshops, Como, Feb. 2011.[11-03] Jörg Keller, Rainer Gerhards.
Peelsched: a Simple and Parallel Scheduling Algorithm for StaticTasksgraphs. (PDF 206 KB)
In: PARS-Mitteilungen Vol. 28 pp. 100-109, 2011.[11-04] Kenan Advic, Nicolas Melot, Jörg Keller, Christoph Kessler.
Parallel sorting on Intel Single-Chip Cloud Computer. (PDF 451 KB)
In: Proc. ISCA 2011, 2nd Workshop on Applications for Multi- and Many-Core Processors (A4MMC), San Jose, CA, June 2011[11-05] Steffen Wendzel, Jörg Keller.
Low-attention forwarding for mobile network covert channels. (PDF 889 KB)
In: 12th Conf. on Communications and Media Security (CMS 2011), Springer LNCS 7025 pp. 122-133, Oct 2011.[11-06] Roman Messmer, Jörg Keller.
On fault-tolerance and bandwidth consumption within fiber-optic media networks.
In: Optoelectronics - Devices and Applications, pp. 369-382, In Tech, 2011.[11-07] Nicolas Melot, Kenan Advic, Christoph Kessler, Jörg Keller.
Investigation of main memory bandwidth on Intel Single-Chip Cloud Computer. (PDF 77 KB)
In: Proc. 3rd MARC Symposium, pp. 107-110, Ettlingen, July 2011.[11-08] Jörg Keller, Mudassar Majeed, Christoph Kessler.
Balancing CPU Load for Irregular MPI Applications. (PDF 173 KB)
In: International Conference in Parallel Computing (PARCO 2011), pp. 307-316, Ghent, Aug 2011.[11-09] Kenan Avdic, Nicolas Melot, Christoph Kessler, Jörg Keller.
Pipelined parallel sorting on the Intel SCC. (PDF 331 KB)
In: Proceedings 4th Swedish Workshop on Multi-Core Computing (MCC-2011), pp. 96-101, Linköping, Nov 2011.[11-10] Steffen Wendzel, Jörg Keller.
Einführung in die Forschungsthematik der verdeckten Kanäle (PDF 310 KB).
Magdeburger Journal zur Sicherheitsforschung, Vol. 2, pp. 115-124, 2011.
Reprint in: J. Sambleben and S. Schumacher: Informationstechnologie und Sicherheitspolitik - Wird der dritte Weltkrieg im Internet ausgetragen?, Magdeburger Institut für Sicherheitsforschung, October 2012. -
[10-01] J. Keller, N.-K. Nguyen, W. Schiffmann.
Evaluation and Refinement of a Tuning Tool for Grid Applications. (PDF 330 KB)
In: Proc. ARCS 2010, 23rd Workshop on Parallel Systems and Algorithms (PARS 2010), Hannover, Feb 2010.[10-02] B. Fechner, A. Osterloh.
A meta-level true random number generator. (PDF 257 KB)
Int. J. Critical Computer-Based Systems, Vol. 1, Nos. 1/2/3, 2010, p. 267.[10-03] H. Klein, J. Keller.
Optimizing RAID for Long Term Data Archives. (PDF 371 KB)
In Proc. 15th IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems (DPDNS 2010), Atlanta, April 2010.[10-04] B. Fechner.
GPU-Based Parallel Signature and Hash Generation. (PDF 209 KB)
In: Proc. ARCS 2010, 23rd Workshop on Parallel Systems and Algorithms (PARS 2010), Hannover, Feb 2010.[10-05] B. Fechner.
Not as it Seems: GPU use for fault-tolerance.
In: Parallel and Distributed Computing, IN-TECH. ISBN-13: 987-3-9026-1345-5.[10-06] B. Fechner.
Analysis and Cure of Timing Master-Faults.
Elektronik automotive, S2/März 2010.
Sonderausgabe MOST.[10-07] B. Fechner, O. Körber,
Improving the Robustness of a Body-Gesture Control.
In Proc. 5th Int´l. Conf. on Dependability of Computer Systems.[10-08] B. Fechner.
Not Yet another language for Petri Nets.
In Proc. 19th European Conf. on Safety and Reliability.[10-09] B. Fechner.
A Fault Model for Integrated Parallel Systems.
In Proc. 19th European Conf. on Safety and Reliability.[10-10] B. Fechner, J. Lisner.
Verräterisches Her(t)z - Audio-Analyse der Pause zwischen
Tastaturanschlägen bei unterschiedlichen Tastaturlayouts.
Erscheint in: Datenschleuder 12/2009, Chaos Computer Club.[10-11] J. Keller, A. L. Varbanescu.
Performance Impact of Task Mapping on the Cell BE Multicore Processor. (PDF 337 KB)
To appear in: Proc. ISCA 2010, 1st Workshop on Applications for Multi- and Many-Core Processors, St. Malo, June 2010.[10-12] R. Hulten, C. W. Kessler, J. Keller.
Optimized on-chip-pipelined mergesort on the Cell/B.E. (PDF 161 KB)
In: Proc. Europar 2010, Ischia, Sept 2010.[10-13] T. Heumann, S. Türpe, J. Keller.
Quantifiying the Attack Surface of a Web Application. (PDF 189 KB)
In: Proc. ISSE/Sicherheit 2010, Berlin, Okt 2010.[10-14] R. Messmer, J. Keller.
Realtime Fault-Tolerant Routing in High-Availability Multicast-AwareVideo Networks. (PDF 272 KB)
In: Proc. ISSE/Sicherheit 2010, Berlin, Okt 2010.[10-15] R. Naues, J. Keller.
Online Storage on Computers as Distributed Long-Term Storage System. (PDF 73 KB)
In: Proc. 18th Interdisciplinary Information Management Talks (IDIMT-2010), Jindrichuv Hradec (Czech), Sept 2010 -
2009
[09-01] C. Kessler, J. Keller.
Optimized Mapping of Pipelined Task Graphs on the Cell BE. (PDF 335 KB)
In Proc. 14th International Workshop on Compilers for Parallel Computers, Zurich, Jan 2009.[09-02] Jörg Keller, Tobias Eggendorfer.
Hash-Wettbewerb SHA-3.
In Linux-Magazin 01/2009, p. 27, Jan 2009.[09-03] Jörg Keller, Tobias Eggendorfer.
Falscher Flieger - Webanwendungen manipulieren am Beispiel des Flughafens München.
In Linux-Magazin 01/2009, pp. 100-103, Jan 2009.[09-04] Susanne Krämer, Hendrik Ditt, Christina Biermann, Michael Lell, Jörg Keller.
A Method for Semi-Automatic Segmentation and Evaluation of Intracranial Aneurysms in Bone-Subtraction Computed Tomography Angiography (BSCTA) Images. (PDF 462 KB)
In Proc. SPIE Medical Imaging Conference 2009, Lake Buena Vista, FL, Feb 2009.[09-05] Henning Klein, Jörg Keller.
RAID Architecture with Correction of Corrupted Data in Faulty Disk Blocks. (PDF 291 KB)
In Proc. 6th ARCS Workshop on Dependability and Fault-Tolerance, Delft, NL, March 2009.[09-06] Bernhard Fechner, Jörg Keller.
Efficient Fault-Tolerant Addition by Operand Width Consideration. (PDF 37 KB)
In Proc. 6th ARCS Workshop on Dependability and Fault-Tolerance, Delft, NL, March 2009.[09-07] Stefan Einer, Bernhard Fechner, Jörg Keller.
Petri Net Analysis of Non-Redundant and Redundant Execution Schemes. (PDF 95 KB)
In Proc. 6th ARCS Workshop on Dependability and Fault-Tolerance, Delft, NL, March 2009.[09-08] A. Osterloh, J. Keller.
Das GCA-Modell im Vergleich zum PRAM-Modell. (PDF 174 KB)
Informatik-Bericht 350 - 03/2009, FernUniversität in Hagen.[09-09] Jörg Keller, Wolfram Schiffmann.
Guiding Performance Tuning for Grid Schedules. (PDF 139 KB)
In Proc. 10th IEEE International Workshop on Parallel and Distributed Scientific and Engineering Computing, Rome, May 2009.[09-10] H. Klein, J. Keller.
Storage Architecture with Integrity, Redundancy and Encryption. (PDF 405 KB)
In Proc. 14th IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems (DPDNS '09), Rome, May 2009.[09-11] J. Keller, A. Osterloh.
Global Cellular Automata: a Path from Parallel Random Access Machines To Practical Implementations. (PDF 202 KB)
To appear in Proc. 22nd PARS-Workshop, Parsberg, June 2009.[09-12] J. Keller, C. Kessler, B. Wesarg.
Efficient Simulation of Fork Programs on Multicore Machines. (PDF 134 KB)
To appear in Proc. 22nd PARS-Workshop, Parsberg, June 2009.[09-13] H. Klein, J. Keller.
Optimizing a Highly Fault Tolerant Software RAID for Many Core Systems. (PDF 188 KB)
In Proc. Int.l Conference on High Performance Computing & Simulation (HPCS'09) Workshop on Dependable Multi-Core Computing, Leipzig, June 2009.[09-14] B. Fechner.
Fault-Masking Capabilities of Basic Circuit Structures. (PDF 3 KB)
In Proc. Fourth International Conference on Dependability of Computer Systems DepCoS - RELCOMEX 2009, Brunow Palace, Poland, June 30-July 02 2009.[09-15] B. Fechner, O. Körber.
A Tool for Dependable and Distributable Presentations. (PDF 3 KB)
In Proc. Fourth International Conference on Dependability of Computer Systems DepCoS - RELCOMEX 2009, Brunow Palace, Poland, June 30-July 02 2009.[09-16] O. Körber, B. Fechner.
Remote HID control of presentations. (PDF 3 KB)
In Proc. 5th Int'l. Conference on Multimedia and Information and Communication Technologies in Education, pp. 1175-1178, 2009.[09-17] B. Fechner.
GPUs for Dependability. (PDF 3 KB)
Informatik-Bericht 351 - 04/2009, FernUniversität in Hagen.[09-18] K. Echtle, B. Fechner, J. Keller.
PAMOS and PAROS - Parallel Addition of Multiple or Redundant Operands in a Single Word. (PDF 251 KB)
In Proc. ESREL 2009 Conference, Prague, Sept 2009.[09-19] C. W. Kessler, J. Keller.
Optimized On-Chip Pipelining of Memory-Intensive Computations on the Cell BE. (PDF 274 KB)
To appear in Computer Architecture News, Special Issue MCC08, Vol. 36 No. 5, Dec 2008.[09-20] K. Maier, A. Hessler, O. Ugus, J. Keller, D. Westhoff.
Multi-Hop Over-the-Air Reprogramming of Wireless Sensor Networks using Fuzzy Control and Fountain Codes.
To appear in Proc. Workshop Self-Organising Wireless Sensor and Communication Networks, Hamburg, Oct 2009.[09-21] R. Messmer, J. Keller.
Real-Time Computation of Point-to-Multipoint Routes in Optical Networks for Digital Television. (PDF 147 KB)
To appear in Proc. 21st IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS 2009), Cambridge, MA, Nov 2009.[09-22] J. Jendrsczok, T. Lenck, R. Hoffmann, J. Keller, Andre Osterloh.
Application-Specific Data Parallel Machine Automatically Generated for the N-body Force Calculation.
Forschungsbericht RA-2-2009, Fachbereich Informatik Technische Universität Darmstadt, Nov 20092008
[08-01] C. Kessler, J. Keller.
Models for Parallel Computing: Review and Perspectives. (PDF 239 KB)
In PARS Mitteilungen GI, ISSN 0177-0454, Feb 2008, pp. 13-29.[08-02] J. Keller, C. Kessler, K. König, W. Heenes.
Hybrid Parallel Sort on the Cell Processor. (PDF 291 KB)
In Proc. ARCS '08 Workshop on Parallel Systems and Algorithms (PASA 2008), Dresden, Feb 2008, pp. 107-112.[08-03] T. Cluzeau, J. Keller, W. Schneeweiss.
An Efficient Algorithm for Computing the Reliability of Consecutive-k-out-of-n:F Systems. (PDF 152 KB)
In IEEE Transactions on Reliability, vol. 57 no. 1 pp. 84-87 March 2008.B. Fechner, U. Hönig, J. Keller, W. Schiffmann.
Fault-Tolerant Static Scheduling for Grids (PDF 291 KB).
In Proc. 13th IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems (DPDNS '08), Miami, April 2008.[08-05] S. Krämer, H. Ditt, C. Biermann, M. Lell, J. Keller.
Bone-Subtraction CT Angiography and Segmentation of Intracranial Aneurysms. (PDF 100 KB)
In Proc. 22nd International Congress on Computer Assisted Radiology and Surgery (CARS 2008),
Barcelona, Spain, June 25-28 2008.
In: International Journal of Computer Assisted Radiology and Surgery, vol. 3 2008 Suppl 1, pp. S344-S346, Springer.[08-06] B. Fechner, A. Osterloh.
A True Random Number Generator with Built-in Attack Detection (PDF 325 KB).
In Proc. Third International Conference on Dependability of Computer Systems DepCoS - RELCOMEX 2008, Szklarska Poreba, Poland, June 26-28 2008, pp. 111-118.[08-07] C. W. Kessler, J. Keller.
Optimized Pipelined Parallel Merge Sort on the Cell BE. (PDF 178 KB)
To appear in Proc. 2nd Workshop on Highly Parallel Processing on a Chip (HPPC/Europar 2008), Las Palmas, Aug 2008.[08-08] B. Fechner.
A Dynamic Fault Classification Scheme (PDF 536 KB).
In Proc. ESREL 2008, Valencia, Spain, Sept 22-25 2008, p. 147-153.[08-09] B. Fechner.
Dynamische Fehlererkennungs- und -behebungsmechanismen für verlässliche Mikroprozessoren.
Informatik-Bericht 347 - 06/2008, FernUniversität in Hagen[08-10] B. Fechner et al.
Hardware Reliability.
In: Dependability Metrics; I. Eusgeld, F. Freiling, R. Reussner (eds.); LNCS 4909; Springer Verlag; Berlin 2008[08-11] B. Fechner
Transiente Fehler in Mikroprozessoren. Mechanismen zur Erkennung, Behebung und Tolerierung.
ISBN 978-3-8348-0714-4, Vieweg + Teubner, 2008[08-12] C. W. Kessler, J. Keller.
Optimized On-Chip Pipelining of Memory-Intensive Computations on the Cell BE (PDF 295 KB).
To appear in Proc. 1st Swedish Workshop on Multi-Core Computing, Ronneby, Nov 2008.[08-13] J. Jendrsczok, R. Hoffmann, J. Keller.
Implementing Hirschberg's PRAM-Algorithm for Connected Components on a Global Cellular Automaton.
In International Journal of Foundations of Computer Science (IJFCS), vol. 19 no. 6 pp. 1299-1316 Dec 2008.2007
2006
[06-01] J. Heichler, J. Keller.
A Distributed Query Structure to Explore Random Mappings in Parallel. (PDF 78 KB)
In Proc. 14th Euromicro Conference on Parallel, Distributed and Network-based Processing, Montbéliard-Sochaux, France, Feb. 2006, pp. 173-177, IEEE 2006.[06-02] J. Keller, J. Magauer.
Error-correcting codes in Steganography (PDF 24 KB).
In Proc. ARCS '06 Workshop on Dependability and Fault Tolerance, Frankfurt, March 2006, pp. 52-55, GI 2006.[06-03] B. Fechner.
Microcode with Embedded Timing Constraints. (PDF 65 KB)
In Proc. ARCS '06 Workshop on Dependability and Fault Tolerance, Frankfurt, March 2006, pp. 45-51, GI 2006.[06-04] C. Meigen, J. Keller.
A simple parallel algorithm for the stepwise approximate computation of Voronoi diagrams of line segments (PDF 764 KB).
In Proc. ARCS '06 Workshop on Parallel Systems and Algorithms (PASA 2006), Frankfurt, March 2006, pp. 305-312, GI 2006.[06-05] B. Fechner, J. Keller, A. Wohlfeld.
Web Server Protection by Customized Instruction Set Encoding. (PDF 281 KB)
In Proc. 11th IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems, Rhodes Island, April 2006.[06-06] B. Fechner.
Analysis of Checksum-Based Execution Schemes for Pipelined Processors (PDF 231 KB).
In Proc. 11th IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems, Rhodes Island, April 2006.[06-07] T. Eggendorfer, J. Keller.
Combining SMTP and HTTP-tar Pits to Proactively Reduce Spam (PDF 323 KB).
In Proc. 2006 International Conference on Security & Management (SAM'06), Las Vegas, June 2006.[06-08] N. Lehmann, R. Schwarz, J. Keller.
Firecrocodile: A Checker for Static Firewall Configurations (PDF 68 KB).
In Proc. 2006 International Conference on Security & Management (SAM'06), Las Vegas, June 2006, pp. 193-199, CSREA Press 2006.[06-09] B. Fechner.
A Result Propagation Scheme for Redundant Multithreaded Systems (PDF 239 KB).
In Proc. 2006 International Conference on Parallel & Distributed Processing Techniques & Applications (PDPTA'06), Las Vegas, June 2006.[06-10] H. Bähring, J. Keller, W. Schiffmann.
Remote Operation and Control of Computer Engineering Laboratory Experiments (PDF 396 KB).
In Proc. 13th Workshop on Computer Architecture Education (WCAE 2006), Boston, Juni 2006.[06-11] A. Treßel, J. Keller.
A System for Secure IP Telephone Conferences (PDF 137 KB).
In Proc. 5th IEEE International Symposium on Network Computing and Applications (IEEE NCA06), Cambridge, MA, July 2006, pp. 231-234, IEEE Press 2006.[06-12] J. Keller, W. Schneeweiss.
Computing Closed Solutions of Linear Recursions with Applications in Reliability Modelling.
Informatik-Bericht 330 - 06/2006, FernUniversität in Hagen[06-13] J. Keller.
Efficient Sampling of the Structure of Cryptographic Generators' State Transition Graphs.
Informatik-Bericht 331 - 06/2006, FernUniversität in Hagen[06-14] B. Fechner.
A Fault-Tolerant Dynamic Fetch Policy for SMT Processors in Multi-Bus Environments (PDF 74 KB).
In Proc. 5th International Symposium on Parallel Computing in Electrical Engineering (PARELEC 2006), Bialiystok, Polen, September 2006, pp. 31-36, IEEE Computer Society 2006.[06-15] T. Eggendorfer, J. Keller.
Dynamically blocking access to web pages for spammers' harvesters (PDF 170 KB).
In Proc. IASTED International Conference on Communication, Network, and Information Security (CNIS 2006), Cambridge, MA, Oct 2006, pp. 205-210, Acta Press 2006.[06-16] J. Keller, R. Naues.
Design of a Virtual Computer Security Lab (PDF 484 KB).
In Proc. IASTED International Conference on Communication, Network, and Information Security (CNIS 2006), Cambridge, MA, Oct 2006, pp. 211-215, Acta Press 2006.[06-17] L. Beyer, B. Fechner, J. Keller.
Analysis of Software-Based Recovery Schemes for SMT-Processors (PDF 201 KB).
In Proc. 18th IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS 2006), Dallas, TX, Nov 2006.[06-18] J. Keller, R. Naues.
A Collaborative Virtual Computer Security Lab (PDF 484 KB).
In Proc. 2nd IEEE International Conference on E-Science and Grid Computing, Workshop on Collaborative Remote Laboratories (CRL 2006), Amsterdam, Dec 2006.[06-19] B. Fechner, J. Keller.
Enhancement and Analysis of a Simple and Efficient VLSI Model. (PDF 208 KB)
Informatik-Bericht 334 - 10/2006, FernUniversität in Hagen[06-20] J. Keller.
Efficient Sampling of the Structure of Crypto Generators' State Transition Graphs (PDF 143 KB).
In Proc. 2nd European Conference on Computer Network Defense (EC2ND), Univ. of Glamorgan, Dec 2006, pp. 3-12, Springer 2006.2005
[05-01] P. Sobe, B. Fechner, J. Keller.
Classification and Unified Modeling for Duplication-based Recovery (Fast Abstract) (PDF 47 KB).
In Proc. Fifth European Dependable Computing Conference (EDCC-5), Budapest, Hungary, Apr. 2005.[05-02] B. Fechner.
Securing Execution in Simultaneous Multithreaded Processors (PDF 41 KB).
In Proc. Fifth European Dependable Computing Conference (EDCC-5), Budapest, Hungary, Apr. 2005.[05-03] B. Fechner.
Dynamic delay-fault injection for reconfigurable hardware (PDF 138 KB).
In Proc. 10th IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems, Denver, CO, Apr. 2005.[05-04] A. Grävinghoff, J. Keller.
Thread-Based Virtual Duplex Systems in Embedded Environments. (PDF 197 KB)
In IEEE Micro, March/April 2005, pp. 60-69.[05-05] H. Bähring, J. Keller, W. Schiffmann.
Web-Based Support for Computer Engineering (PDF 3 MB).
In Proc. 5th Conference Virtual University: VU 2005, Warzaw, June 2005.[05-06] J. Heichler, J. Keller, J. F. Sibeyn.
Parallel Storage Allocation for Intermediate Results During Exploration of Random Mappings (PDF 104 KB).
In Proc. 20 Workshop Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware (PARS '05), Lübeck, June 2005, pp. 126-134, GI 2005.[05-07] B. Fechner, J. Keller, W. Schiffmann.
Evaluation of a Virtual Computer Architecture Lab (PDF 36 KB).
In Proc. EADTU 2005 Working Conference, Rome, Nov 10-11, 2005.[05-08] B. Fechner.
Design and implementation of a framework for remotely accessible instruments (PDF 180 KB).
In Proc. EADTU 2005 Working Conference, Rome, Nov 10-11, 2005.[05-09] T. Eggendorfer, J. Keller.
Preventing Spam by Dynamically Obfuscating Email-Adresses (PDF 42 KB).
In Proc. IASTED Int.l Conference on Communication, Network and Information Security (CNIS 2005), Phoenix, AZ, Nov 14-16, 2005, pp. 42-47, ACTA Press 2005.[05-10] B. Fechner.
Fehlerinjektion für rekonfigurierbare Hardware (PDF 312 KB).
In Proc. Diskussionskreis Fehlertoleranz 2005, München, März 2005, pp. 43-51, A. Bode (ed.), J.-Th. Czornack et al.. (Hrsg.), Shaker-Verlag, 2005.2004
[04-01] J. Keller, O. Monien.
Improving HTTP-Server Performance by Adapted Multithreading (PDF 610 KB).
In Proc. IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN 2004), Innsbruck, Feb. 2004, pp. 631-636, IASTED 2004.[04-02] J. Keller, P. Sobe.
Virtual Duplex Systems with Forward Error Correction on Simultaneous Multithreaded Processors (PDF 64 KB).
In Proc. 16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Dresden, März 2004.[04-03] L. Boursas, J. Keller.
Implementation and Evaluation of a Parallel-External Algorithm for Cycle Structure Computation on a PC-Cluste (PDF 145 KB)r.
In Proc. 7th GI/ITG Workshop Parallel Systems and Algorithms, Augsburg, March 2004, pp. 348-357, Gesellschaft für Informatik, 2004.[04-04] B. Fechner, J. Keller, P. Sobe.
Performance Estimation of Virtual Duplex Systems on Simultaneous Multithreaded Processors (PDF 171 KB).
In Proc. 9th IEEE Workshop on Fault-Tolerant Parallel, Distributed and Network-Centric Systems, Santa Fe, Apr. 2004.[04-05] U. Hönig, J. Keller, W. Schiffmann.
Internet-basierter Übungsbetrieb in Technischer Informatik. (PDF 373 KB)
In IT - Information Technology, Heft 5, 2004, pp. 255-264.[04-06] H. Bähring, J. Keller, W. Schiffmann.
A Combined Virtual and Remotely Accessible Microprocessor Laboratory (PDF 485 KB).
In Proc. 11th Workshop on Computer Architecture Education (WCAE 2004), München, Juni 2004, pp. 136-141, http://www4.ncsu.edu/~efg/wcae/2004/.[04-07] B. Fechner, J. Keller.
A Fault-Tolerant Voting Scheme for Multithreaded Environments (PDF 200 KB).
In Proc. 4th International Conference on Parallel Computing in Electrical Engineering, Dresden, Sept. 2004, pp. 237-239, IEEE Computer Society 2004.2003
[03-01] J. Keller.
Das Webgestützte Kursvermittlungssystem CUBER (PDF 135 KB).
Jahrbuch 2002 der Gesellschaft der Freunde der FernUniversität, 119-127, 2003.[03-02] L. Boursas, J. Keller, S. Magerkurth.
A Web-Based Decision Support System for Course Alternatives in the Study Programme Broker CUBER (PDF 114 KB).
In Proc. ED-MEDIA 2003 World Conference on Educational Multimedia, Hypermedia & Telecommunications, Honolulu, June 2003, pp. 363-366, AACE, 2003.[03-03] J. Keller, A. Grävinghoff.
Evaluation of Thread-Based Virtual Duplex Systems in Embedded Environments (AVI 97 KB)
In Proc. GI-Jahrestagung 2003, Teiltagung Sicherheit - Schutz und Zuverlässigkeit, Frankfurt, Sept 2003, pp. 151-162, Lecture Notes in Informatics P-36, Gesellschaft für Informatik 2003.[03-04] U. Hönig, J. Keller, W. Schiffmann.
Web-Based Exercises in Computer Engineering. (PDF 156 KB)
In Proc. International Conference on Networked e-learning for European Universities, Granada, Nov. 2003.[03-05] U. Hönig, J. Keller, W. Schiffmann.
Internet-basierter Übungsbetrieb in Technischer Informatik (PDF 156 KB).
Informatik-Berichte 304, FernUniversität Hagen, Nov. 2003.2002
[02-01] J. Keller.
A Heuristic to Accelerate In-Situ Permutation Algorithms (PDF 85 KB).
In Information Processing Letters, vol. 81 no. 3, 2002, pp. 119-125.[02-02] J. Keller.
Parallel Exploration of the Structure of Random Functions (PDF 46 KB).
In Proc. PASA 2002, Karlsruhe, April 2002, pp. 233-236, VDE Verlag 2002.[02-03] L. Boursas, J. Keller.
A Method to Automatically Recommend Course Alternatives in the Web-Based Coure Broker CUBER (PDF 16 KB).
In Proc. 2nd EDEN Research Workshop, Hildesheim, March 2002, pp. 141-143, EDEN 2002.[02-04] G. Csanyi, E. Galindo Ramos, H. Kautonen, J. Keller.
Workpackage 9 Credit Point System Integration -- Final Report, Impact Analysis and Best Practice Report (PDF 377 KB).
Deliverable D9.2, EU-Project CUBER, Personalised Curriculum Builder in the Federated Virtual University of the Europe of Regions, Contract No: IST-1999-10737, 2002.[02-05] A. Grävinghoff.
On the Realization of Fine-Grained Multithreading in Software (PDF 2 MB).
PhD Thesis, FB Informatik, FernUniversität Hagen, defended Jan 2002.2001
[01-01] J. Keller, C. Kessler, J. Träff.
Practical PRAM Programming.
Wiley and Sons, Januar 2001.[01-02] G. Csanyi, J. Keller.
European Credit Transfer System as Basis for Generalised Course Recognition (PDF 207 KB).
Deliverable D8.6, EU-Project CUBER, Personalised Curriculum Builder in the Federated Virtual University of the Europe of Regions, Contract No: IST-1999-10737, 2001.[01-03] H. Bähring, J. Keller, W. Schiffmann.
Einsatz von neuen Medien an der FernUniversität Hagen (PDF 133 KB).
In Informationstechnik und Technische Informatik, vol. 43 no. 4, 2001, pp. 215-218.[01-04] J. Keller, J. F. Sibeyn.
Beyond External Computing: Analysis of the Cycle Structure of Permutations (PDF 185 KB).
In Proc. Euro-Par 2001, Manchester, UK, Aug. 2001, pp. 333-342, LNCS 2150, Springer Verlag 2001.[01-05] E. Galindo Ramos, H. Kautonen, J. Keller.
Workpackage 9 Credit Point System Integration -- Intermediate Report Including Revision of Metadata. (PDF 288 KB)
Deliverable D9.1, EU-Project CUBER, Personalised Curriculum Builder in the Federated Virtual University of the Europe of Regions, Contract No: IST-1999-10737, 2001.[01-06] J. Keller, B. Seitz.
A Hardware-Based Attack on the A5/1 Stream Cipher (PDF 74 KB).
In Proc. APC 2001, München, Okt. 2001, pp. 155-158, VDE Verlag, 2001.2000
[00-01] J. Keller, T. Ungerer (Eds.).
Special Issue on Multithreaded Processors and Chip Multiprocessors.
In Journal of Universal Computer Science, October 2000.[00-02] J. Keller, L. Zhu.
Fisheye Views of 2D Graphs and 3D Objects (PDF 188 KB).
Informatik-Berichte 271, FernUniversität Hagen, Juni 2000.[00-03] I. Biehl, A. Grävinghoff, J. Keller.
Customizing Programmable Hardware for Encryption Keys (PDF 123 KB).
Informatik-Berichte 274, FernUniversität Hagen, Sept. 2000.[00-04] J. Keller.
A parallel Algorithm to compute a permutations's cycle structure (PDF 59 KB).
Informatik-Berichte 275, FernUniversität Hagen, Sept. 2000.1999
[99-01] J. Keller, A. Poetzsch-Heffter.
Bachelor in Informatik: Für die FernUniversität ein Muss (PDF 22 KB).
Jahrbuch 1998 der Gesellschaft der Freunde der FernUniversität, 147-152, 1999.[99-02] J. Keller, T. Rauber, B. Rederlechner.
Scalability Analysis for Conservative Simulation of Logical Circuits (PDF 426 KB).
In VLSI DESIGN, vol. 9 no. 3, 1999, pp. 219--235.[99-03] F. Abolhassan, J. Keller, W. J. Paul.
On the Cost-Effectiveness of PRAMs (PDF 155 KB).
In Acta Informatica, vol. 36 no. 6, 1999, pp. 463--487.[99-04] A. Grävinghoff, J. Keller.
Virtual Duplex Systems in Embedded Environments (PDF 46 KB).
In Proc. ARCS '99 Architektur von Rechensystemen, Workshop "`Verläßlichkeit und Fehlertoleranz"', Jena, Oktober 1999, pp. 69-77, 1999.[99-05] J. Keller, M. Manasijevic.
A New Data Structure for Shannon Decomposition (PDF 64 KB).
In Proc. ARCS '99 Architektur von Rechensystemen, Workshop" `Verläßlichkeit und Fehlertoleranz"', Jena, Oktober 1999, pp.109-116, 1999.[99-06] I. Biehl, J. Keller.
Effizienzverbesserungen durch schlüssel-optimierte Ver- und Entschlüsselung in Workstations (PDF 31 KB).
In Proc. ARCS '99 Architektur von Rechensystemen / APS '99 Arbeitsplatz-Rechensysteme, Jena, Oktober 1999, pp. 279-283, VDE-Verlag, 1999.[99-07] K. Echtle, J. Keller (Eds.).
Special Issue on Dependability Evaluation and Validation.
In Journal of Universal Computer Science, vol. 5 no. 10, October 1999.[99-08] A. Grävinghoff, J. Keller.
Fine-grained Multithreading on the Cray T3E (PDF 145 KB).
In Proc. High-Performance Computing in Science and Engineering, October 1999, pp. 447-456, Springer Verlag, 2000.1998
[98-01] J. Keller.
Zur Verwendung von Fischaugen-Darstellungen bei der graphischen Schaltungsbearbeitung.
Jahrbuch 1997 der Gesellschaft der Freunde der FernUniversität, 171-179, 1998.[98-02] J. Keller, G. Zimmermann.
Leistungspunktsysteme im Fach Informatik (PDF 94 KB).
In Proc. 28. Jahrestagung der Gesellschaft für Informatik, Minisymposium Neue Entwicklungen in der Informatikausbildung, Magdeburg, September 1998.[98-03] A. Grävinghoff, J. Keller.
How to Emulate Fine-Grained Multithreading (PDF 166 KB).
In Proc. 2nd International Conference on
Parallel and Distributed Computing and Networks (PDCN'98),
Brisbane, Australia, Dezember 1998, pp. 584-589, Acta Press 1998.[98-04] M. Braun, A. Grävinghoff, J. Keller.
Fault-Tolerance Mechanisms in the SB-PRAM Multiprocessor (PDF 40 KB).
In Proc. 2nd International Conference on Parallel and Distributed Computing and Networks (PDCN'98), Brisbane, Australia, Dezember 1998, pp. 561-564, Acta Press 1998.[98-05] J. Keller.
Wie rechnen Computer? Hagener Universitätsreden 25.4, Mai 1998.1997
[97-01] A. Formella, T. Grün, J. Keller, W.J. Paul (eingeladen), T. Rauber, G. Rünger.
Scientific Applications on the SB-PRAM. (PDF 139 KB)
In Proc. International Conference on Multi-Scale Phenomena and their Simulation, Bielefeld, Okt. 1996, pp. 272-281, World Scientific Publ. 1997.[97-02] J. Keller, W. J. Paul.
Hardware Design - Formaler Entwurf digitaler Schaltungen.
Teubner Verlag, 2. Auflage 1997.[97-03] A. Formella, J. Keller.
Parallel Software Caches (PDF 180 KB).
In Proc. 4th International Symposium on Solving Irregularly Structured Problems in Parallel (IRREGULAR '97), Paderborn, Juni 1997, pp. 219-232, LNCS 1253, Springer Verlag 1997.[97-04] J. Keller, B. Rederlechner.
A Note on Correctness Proofs for Overflow Detection Logic in Adders for d-th Complement Numbers (PDF 122 KB)
Journal of Universal Computer Science, vol. 3 no. 10, 1997, pp. 1121-1125. -
1996
[96-01] J. Keller.
Fast Rehashing in PRAM Emulations (PDF 178 KB).
Theoretical Computer Science, vol. 155, 1996, pp. 349-363.[96-02] J. Keller, T. Rauber, B. Rederlechner.
Conservative Circuit Simulation on Shared--Memory Multiprocessors (PDF 89 KB).
In Proc. 10th Workshop on Parallel and Distributed Simulation, Philadelphia, Penn., Mai 22-24, 1996, pp. 126-134, IEEE Computer Society Press, 1996.[96-03] J. Friedrich, T. Grün, J. Keller.
Video-on-Demand on the SB--PRAM. (PDF 139 KB)
In Proc. 6th International Workshop on Network and Operating Systems Support for Digital Audio and Video (NOSSDAV 96), Zushi, Japan, April 1996, pp. 105-111, 1996.[96-04] A. Formella, J. Keller, T. Walle.
HPP: A High Performance PRAM (PDF 59 KB).
In Proc. Europar '96, Lyon, Frankreich, August 1996, pp. 425-434, LNCS 1124, Springer Verlag 1996.1995
[95-01] J. Keller, W. J. Paul.
Hardware Design - Formaler Entwurf digitaler Schaltungen.
Teubner Verlag, 1995.[95-02] T. Hagerup, J. Keller.
Fast Parallel Permutation Algorithms (PDF 140 KB).
Parallel Processing Letters, vol. 5, no. 2, 1995, pp. 139-148.[95-03] J. Keller, T. Walle.
A Note on Implementing Combining Networks (PDF 120 KB).
Information Processing Letters, vol. 55 no. 4, 1995, pp. 195-200.[95-04] A. Formella, J. Keller.
Generalized Fisheye Views of Graphs (PDF 337 KB).
In Proc. Graph Drawing '95, Passau, Sept. 1995, pp. 242-253, LNCS 1027, Springer Verlag 1995.1994
[94-01] J. Keller.
Regular Layouts of Butterfly Networks. (PDF 165 KB)
Integration - the VLSI Journal, vol. 17 no. 3, 1994, pp. 253-263.[94-02] R. Drefenstedt, J. Keller, W.J. Paul (eingeladen).
Applications of PRAMs in Telecommunications (PDF 91 KB).
In Proc. 13th World Computer Congress, IFIP Congress '94, Hamburg, Aug. 1994, Vol. 1, pp. 203-210, Elsevier Science Publishers 1994.[94-03] J. Keller, W. J. Paul (eingeladen), D. Scheerer.
Realization of PRAMs: Processor Design (PDF 140 KB).
In Proc. WDAG '94, 8th International Workshop on Distributed Algorithms, Terschelling, Niederlande, Sept. 1994, pp. 17-27, LNCS 857, Springer Verlag 1994.1993
[93-01] D. Cross, R. Drefenstedt, J. Keller.
Reduction of Network Cost and Wiring in Ranade's Butterfly Routing (PDF 133 KB).
Information Processing Letters, vol. 45 no. 2, 1993, pp. 63-67.[93-02] C. Engelmann, J. Keller.
Simulation-based Comparison of Hash Functions for Emulated Shared Memory (PDF 152 KB).
In Proc. PARLE '93, Parallel Architectures and Languages Europe, München, Juni 1993, pp. 1-11, LNCS 694, Springer Verlag 1993.[93-03] J. Keller.
Fast Rehashing in PRAM Emulations (PDF 140 KB).
In Proc. 5th IEEE Symposium on Parallel and Distributed Processing, Dallas, TX, Dez. 1993, pp. 626-632, IEEE Computer Society Press 1993.[93-04] F. Abolhassan, R. Drefenstedt, J. Keller, W.J. Paul, D. Scheerer.
On the Physical Design of PRAMs (PDF 176 KB).
Computer Journal, vol. 36 no. 8, 1993, pp. 756-762.1992
[92-01] F. Abolhassan, R. Drefenstedt, J. Keller, W.J. Paul, D. Scheerer.
On the Physical Design of PRAMs (PDF 3 MB).
In J. Buchmann, H. Ganzinger, W.J. Paul (Eds.), Informatik - Festschrift zum 60. Geburtstag von Günter Hotz, pp. 1-19, Teubner Verlag 1992.[92-02] J. Keller.
Zur Realisierbarkeit des PRAM Modells (PDF 783 KB).
Dissertation, Technische Fakultät, Universität des Saarlandes, Mai 1992.1991
[91-01] F. Abolhassan, J. Keller, W.J. Paul.
On the Cost-Effectiveness of PRAMs (PDF 223 KB).
In Proc. 3rd IEEE Symposium on Parallel and Distributed Processing, Dallas, TX, Dez. 1991, pp. 2-9, IEEE Press 1991.1990
[90-01] P. Bergmann, J. Keller, W.J. Paul.
A Self-Organizing System for Image Recognition (PDF 957 KB).
In Proc. IASTED International Symposium Machine Learning and Neural Networks, New York, NY, Okt. 1990, pp. 33-36, Acta Press 1990.[90-01] F. Abolhassan, J. Keller, W.J. Paul.
Übersicht über PRAM-Simulationen und ihre Realisierbarkeit.
In T. Härder, H. Wedekind, G. Zimmermann (Eds.), Entwurf und Betrieb verteilter Systeme. Fachtagung der SFB's 124 und 182, Proc. Dagstuhl, Sept. 1990, pp. 15-39, IFB 264, Springer Verlag 1990.1989
[89-01] J. Keller.
Ein Algorithmus zur Lösung eines speziellen Optimierungsproblems.
Diplomarbeit, FB Informatik, Universität des Saarlandes, Okt. 1989.1988
[88-01] P. Bergmann, J. Keller, T. Malter, S. M. Müller, W. J. Paul, T. Pöschel, O. Schlüter, L. Thiele.
Implementierung eines informationstheoretischen Ansatzes zur Bilderkennung (PDF 1 MB).
In B. Gollan, W.J. Paul, A. Schmitt (Eds.), Innovative Informations-Infrastrukturen, Proc. I.I.I.-Forum, Saarbrücken, Okt. 1988, pp. 187-197, IFB 184, Springer Verlag 1988.